The details of designing a drive circuit for a multiplexed LCD are covered in our App note Multiplexed Liquid Crystal Displays. We will only cover the highlights here. We also have a sample drive circuit on in our Application Notes section, entitled A Sample Multiplex Drive Circuit. There are also numerous design guides available from the many LSI chip vendors, which contain excellent design tips and guidelines.
To aid in explaining the relationship between duty cycle and bias levels, we will choose a multiplex level of 64, which is a common multiplex duty cycle for a graphics display. To understand why specific bias levels are chosen, we will look at possible bias levels, and demonstrate why there is an optimum bias. What effect on the viewed display will switching between an LCD Bias of 1/9 and 1/8 have? Why is LCD Bias limited to 1/9 and 1/8 for Duty = 64?
The duty cycle defines the recommended bias. There are optimum bias levels for each duty cycle that will define the largest on/off voltage ratio to the LCD. The following formulas define the on and off voltages that the display will see for a given mux level and bias configuration.
Vrms OFF = Vb ⁄ S [((N-1) + (S-2)2)/N]1/2 where Vb is the bias (supply) voltage
Vrms ON = Vb ⁄ S [((N-1) + S2)/N]1/2
S = bias => 1 + √N (nearest integer)
N = multiplex level
As an example, for 1/64 duty, the following bias levels will give these corresponding on/off voltage ratios.
| Bias configuration | On/Off ration |
|---|---|
| 7 | 1.128 |
| 8 | 1.133 |
| 9 | 1.134 |
| 10 | 1.133 |
| 11 | 1.130 |
Note that Bias = 9 gives the largest on/off ratio, to optimize the contrast.
The necessary bias voltages are usually generated by the use of a resistor dividing network, and example of which is shown below. Vcc is usually 5 volts, and the number of resistors in the ladder is determined from the table above.
The values of the resistors is determined mostly by power requirements and waveform distortion. Because an LCD is a capacitive load, the values should be decreased to decrease distortion. However, this increases power consumption. These values should therefore be made as large as possible, keeping in mind that very large displays have very large capacitance, and may require lowering the resistor values.
